Add support for phy interrupts on BCM54213PE#6942
Merged
pelwell merged 2 commits intoraspberrypi:rpi-6.12.yfrom Jul 8, 2025
Merged
Add support for phy interrupts on BCM54213PE#6942pelwell merged 2 commits intoraspberrypi:rpi-6.12.yfrom
pelwell merged 2 commits intoraspberrypi:rpi-6.12.yfrom
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CM5 features the same Broadcom BCM54213PE phy for ethernet as present on pi5, but with a different mdio address (0 instead of 1 on pi5). Fix this and use correct mdio address 0. While at it set interrupt_parent to rp1_gpio instead of gpio (which is an alias to the former) as this is the handle already used in this block. Signed-off-by: Nicolai Buchwitz <nb@tipi-net.de>
The phy specific structure is missing the pointers for handling interrupts and link change notification. This results in interrupt's being polled on CM5: Fix this and copy the existing pointers from BCM54210E, which match the implementation. Before: [3.501498] macb 1f00100000.ethernet eth0: PHY [1f00100000.ethernet-ffffffff:00] driver [Broadcom BCM54213PE] (irq=POLL) After: [3.597582] macb 1f00100000.ethernet eth0: PHY [1f00100000.ethernet-ffffffff:00] driver [Broadcom BCM54213PE] (irq=168) Signed-off-by: Nicolai Buchwitz <nb@tipi-net.de>
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The code change looks great - simply opting into the interrupt facility. The DT changes are unnecessary - the firmware already patches the PHY address (in case the address changes in the future), and the |
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Yes, the firmware patches the address, but why not specify the correct one in the node? Agree that this is maybe a nit pit, but I prefer when the dt doesn't rely on some firmware automatisms when possible. |
popcornmix
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kernel: Add support for phy interrupts on BCM54213PE See: raspberrypi/linux#6942 kernel: usb: dwc2: masquerade split-interrupt transfers See: raspberrypi/linux#6936
popcornmix
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kernel: Add support for phy interrupts on BCM54213PE See: raspberrypi/linux#6942 kernel: usb: dwc2: masquerade split-interrupt transfers See: raspberrypi/linux#6936
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While working on the eee support for rp1's macb driver, I noticed that CM5 defines a phy interrupt, but it isn't used at all. It's caused by missing pointers in the ops struct of BCM54213PE. Also the mdio address differes from pi5 (probably different strapping on the board?), which is fixed by this series.
Before:
After: